Core Knowledge

Learn how to add your custom hardware (written in Verilog or VHDL) to an existing RISC-V computer system.
Learn how to control and debug your custom hardware in software after regenerating the system.

Course Requirement

Participants must have digital design knowledge and know how to use Verilog (or VHDL) language.
Participants don’t need to know the Scala-CHISEL language to learn this course.

Exercises in this course use the Arty-A7 FPGA board. Participants need to have an Arty-A7 to learn this course.
Note: both 35T and 100T versions of the FPGA are ok.

Course List

Lecture Title
1 RISC-V Introduction
2 Creating Project with Chipyard
3 Computer System on Arty-A7
4 Boot Sequence and Software
5 Custom Hardware on Peripheral
6 Custom Hardware in ROCC
7 Course Summary

Lecture #1:    RISC-V Introduction

  • Description:    Explain the structure of a typical computer system. Introduce RISC-V and RISC-V ISA. Giving materials and some RISC-V news.
  • Purpose:         To learn what is a computer system in general. To learn the idea of RISC-V and ISA. To know what RISC-V is capable of and what we can do with RISC-V.

Lecture #2:    Creating Project with Chipyard

  • Description:    Introduce Chipyard library and explain its structure. Show how to git clone and make. Learn how to create a new Chisel project using this Chipyard library as a template.
  • Purpose:         Know how to use the Chipyard library. Know how to create a new Chisel project using Chipyard template.

Lecture #3:    Computer System on Arty-A7

  • Description:    Introduce the RISC-V computer system. Learn how to Git clone and make the system. Learn how to program with the Arty-A7 FPGA board. Learn how to change some of the system configurations.
  • Purpose:         Get familiar with a complex RISC-V folder structure using Chipyard. Get used to the Arty-A7 FPGA board. Learn about system details and how to change some of the configurations.

Lecture #4:    Boot Sequence and Software

  • Description:    Describe the typical boot flow of computer systems. Describe our system’s boot sequence with the default software. Learn how to change the default program with your custom codes.
  • Purpose:         Learn the typical boot flow of computer systems. Understand the boot flow of our computer system. Learn how to make a custom program for our computer system.

Lecture #5:    Custom Hardware on Peripheral

  • Description:    Explain the TileLink bus protocol and the peripheral’s memory-mapped communication. Explain the GCD circuit and how to write a Scala wrapper for that circuit. Finally, learn how to write software to control the new hardware.
  • Purpose:         Know about the TitleLink protocol. Understand the memory-mapped communication in a computer system. Learn how to write a Scala wrapper for custom hardware. Learn how to control the custom hardware in software.

Lecture #6:    Custom Hardware in ROCC

  • Description:    Explain the ROCC. Reuse the GCD circuit, but this time attach it to the ROCC instead of the peripheral. Finally, learn how to control the ROCC module with software.
  • Purpose:         Understand that there are options for putting in custom hardware: peripheral or ROCC, each with a different purpose. Know how to do ROCC and control it with software.

Lecture #7:    Course Summary

  • Description:    A top-down review from ISA to software and hardware.
  • Purpose:         Review all lectures related to RISC-V computer system.